From cc51562f789209e9ae7b45cb1c152181d6c37bc7 Mon Sep 17 00:00:00 2001 From: Peter Johanson Date: Mon, 21 Feb 2022 23:26:34 -0500 Subject: [PATCH] fix(boards): Move ARM clock config to DTS. --- app/boards/arm/bdn9/bdn9_rev2.dts | 49 ++++++++++++++------ app/boards/arm/bdn9/bdn9_rev2_defconfig | 18 ++----- app/boards/arm/ferris/ferris_rev02.dts | 20 ++++++++ app/boards/arm/ferris/ferris_rev02_defconfig | 12 +---- app/boards/arm/planck/planck_rev6.dts | 25 +++++++++- app/boards/arm/planck/planck_rev6_defconfig | 13 +----- app/boards/arm/proton_c/proton_c.dts | 36 +++++++++++++- app/boards/arm/proton_c/proton_c_defconfig | 15 +----- 8 files changed, 122 insertions(+), 66 deletions(-) diff --git a/app/boards/arm/bdn9/bdn9_rev2.dts b/app/boards/arm/bdn9/bdn9_rev2.dts index 3ce9758d..a28a3ae5 100644 --- a/app/boards/arm/bdn9/bdn9_rev2.dts +++ b/app/boards/arm/bdn9/bdn9_rev2.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include #include / { @@ -19,7 +20,7 @@ zmk,kscan = &kscan; /* TODO: Enable once the GPIO bitbanging driver supports STM32 zmk,underglow = &led_strip; - */ + */ }; kscan: kscan { @@ -27,16 +28,16 @@ label = "KSCAN"; input-gpios - = <&gpiob 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiob 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiob 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpioa 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiof 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - , <&gpiof 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> - ; + = <&gpiob 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiof 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiof 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + ; }; /* @@ -48,7 +49,7 @@ chain-length = <9>; }; - */ + */ left_encoder: encoder_left { compatible = "alps,ec11"; @@ -82,8 +83,28 @@ }; }; +&clk_hsi { + status = "okay"; +}; + +&pll { + status = "okay"; + prediv = <1>; + mul = <6>; + clocks = <&clk_hsi>; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; +}; + &usb { status = "okay"; + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; cdc_acm_uart: cdc_acm_uart { compatible = "zephyr,cdc-acm-uart"; label = "CDC_ACM_0"; @@ -97,7 +118,7 @@ &flash0 { /* * For more information, see: - * http: //docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions + * http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions */ partitions { compatible = "fixed-partitions"; @@ -105,7 +126,7 @@ #size-cells = <1>; /* Set 6Kb of storage at the end of the 128Kb of flash */ - storage_partition: partition@3e800 { + storage_partition: partition@1e800 { label = "storage"; reg = <0x0001e800 0x00001800>; }; diff --git a/app/boards/arm/bdn9/bdn9_rev2_defconfig b/app/boards/arm/bdn9/bdn9_rev2_defconfig index 31395716..24dddb93 100644 --- a/app/boards/arm/bdn9/bdn9_rev2_defconfig +++ b/app/boards/arm/bdn9/bdn9_rev2_defconfig @@ -11,11 +11,11 @@ CONFIG_FPU=y # enable GPIO CONFIG_GPIO=y -# Needed for matrix to properly work -CONFIG_ZMK_KSCAN_DIRECT_POLLING=y +# Enable pinctrl +CONFIG_PINCTRL=y -# Enable pinmux -CONFIG_PINMUX=y +# Poll to avoid interrupt overlap issues +CONFIG_ZMK_KSCAN_DIRECT_POLLING=y # Needed to reduce this to size that will fit on F072 CONFIG_HEAP_MEM_POOL_SIZE=1024 @@ -23,13 +23,3 @@ CONFIG_HEAP_MEM_POOL_SIZE=1024 # clock configuration CONFIG_CLOCK_CONTROL=y -# Clock configuration for Cube Clock control driver -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y -# use HSI as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSI=y -# produce 72MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_PREDIV=1 -CONFIG_CLOCK_STM32_PLL_MULTIPLIER=12 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1 diff --git a/app/boards/arm/ferris/ferris_rev02.dts b/app/boards/arm/ferris/ferris_rev02.dts index 45c57dff..dbf3f6e2 100644 --- a/app/boards/arm/ferris/ferris_rev02.dts +++ b/app/boards/arm/ferris/ferris_rev02.dts @@ -99,6 +99,7 @@ &i2c2 { pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>; + pinctrl-names = "default"; status = "okay"; clock-frequency = ; @@ -117,6 +118,25 @@ status = "okay"; }; +&clk_hsi { + status = "okay"; +}; + +&pll { + prediv = <1>; + mul = <6>; + clocks = <&clk_hsi>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; +}; + + &rtc { status = "okay"; cdc_acm_uart: cdc_acm_uart { diff --git a/app/boards/arm/ferris/ferris_rev02_defconfig b/app/boards/arm/ferris/ferris_rev02_defconfig index 99c0b329..8742cd86 100644 --- a/app/boards/arm/ferris/ferris_rev02_defconfig +++ b/app/boards/arm/ferris/ferris_rev02_defconfig @@ -7,7 +7,7 @@ CONFIG_SOC_STM32F072XB=y CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 # enable PINMUX -CONFIG_PINMUX=y +CONFIG_PINCTRL=y # enable GPIO CONFIG_GPIO=y @@ -31,13 +31,3 @@ CONFIG_HEAP_MEM_POOL_SIZE=1024 # clock configuration CONFIG_CLOCK_CONTROL=y -# Clock configuration for Cube Clock control driver -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y -# use HSI as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSI=y -# produce 48MHz clock at PLL output -# CONFIG_CLOCK_STM32_PLL_PREDIV=1 -CONFIG_CLOCK_STM32_PLL_MULTIPLIER=6 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 -CONFIG_CLOCK_STM32_APB1_PRESCALER=1 -# CONFIG_CLOCK_STM32_APB2_PRESCALER=1 diff --git a/app/boards/arm/planck/planck_rev6.dts b/app/boards/arm/planck/planck_rev6.dts index ea45f33b..97239595 100644 --- a/app/boards/arm/planck/planck_rev6.dts +++ b/app/boards/arm/planck/planck_rev6.dts @@ -1,11 +1,12 @@ /* - * Copyright (c) 2017 I-SENSE group of ICCS + * Copyright (c) 2020 The ZMK Contributors * * SPDX-License-Identifier: MIT */ /dts-v1/; #include +#include #include / { @@ -83,6 +84,8 @@ layout_2x2u_transform: }; &usb { + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; status = "okay"; cdc_acm_uart: cdc_acm_uart { compatible = "zephyr,cdc-acm-uart"; @@ -90,6 +93,26 @@ layout_2x2u_transform: }; }; +&clk_hse { + status = "okay"; + clock-frequency = ; +}; + +&pll { + prediv = <1>; + mul = <9>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <2>; + apb2-prescaler = <1>; +}; + &flash0 { /* * For more information, see: diff --git a/app/boards/arm/planck/planck_rev6_defconfig b/app/boards/arm/planck/planck_rev6_defconfig index e34ce002..a78ea45d 100644 --- a/app/boards/arm/planck/planck_rev6_defconfig +++ b/app/boards/arm/planck/planck_rev6_defconfig @@ -8,21 +8,10 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 # enable pinmux CONFIG_PINMUX=y +CONFIG_PINCTRL=y # enable GPIO CONFIG_GPIO=y # clock configuration CONFIG_CLOCK_CONTROL=y - -# Clock configuration for Cube Clock control driver -CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y -# use HSE as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# produce 72MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_PREDIV=1 -CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1 diff --git a/app/boards/arm/proton_c/proton_c.dts b/app/boards/arm/proton_c/proton_c.dts index 5a367d40..df63427f 100644 --- a/app/boards/arm/proton_c/proton_c.dts +++ b/app/boards/arm/proton_c/proton_c.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Pete Johanson + * Copyright (c) 2020 The ZMK Contributors * * SPDX-License-Identifier: MIT */ @@ -16,6 +16,11 @@ chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,console = &cdc_acm_uart0; + }; + + aliases { + led0 = &led; }; leds { @@ -29,18 +34,47 @@ &usart1 { pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; + pinctrl-names = "default"; }; &spi2 { pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>; + pinctrl-names = "default"; }; &i2c1 { pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>; + pinctrl-names = "default"; +}; + +&clk_hse { + status = "okay"; + clock-frequency = ; +}; + +&pll { + prediv = <1>; + mul = <9>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <2>; + apb2-prescaler = <1>; }; &usb { + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; status = "okay"; + cdc_acm_uart0: cdc_acm_uart0 { + compatible = "zephyr,cdc-acm-uart"; + label = "CDC_ACM_0"; + }; }; &rtc { diff --git a/app/boards/arm/proton_c/proton_c_defconfig b/app/boards/arm/proton_c/proton_c_defconfig index 0f624616..32e1ade9 100644 --- a/app/boards/arm/proton_c/proton_c_defconfig +++ b/app/boards/arm/proton_c/proton_c_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 # Floating Point Options CONFIG_FPU=y -# enable pinmux -CONFIG_PINMUX=y +# enable pinctrl +CONFIG_PINCTRL=y # enable GPIO CONFIG_GPIO=y @@ -17,14 +17,3 @@ CONFIG_GPIO=y # clock configuration CONFIG_CLOCK_CONTROL=y -# Clock configuration for Cube Clock control driver -CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y -# use HSE as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# produce 72MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_PREDIV=1 -CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1