feat(display): IL0323 driver for EPD displays.
* Basic driver, using the GD7965 driver as a basis, since the ICs are very similar.
This commit is contained in:
Darryldh
Peter Johanson
parent
08078210da
commit
a124eb9f9e
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@ -2,4 +2,5 @@
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# SPDX-License-Identifier: MIT
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add_subdirectory(kscan)
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add_subdirectory(sensor)
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add_subdirectory(sensor)
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add_subdirectory(display)
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@ -2,4 +2,5 @@
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# SPDX-License-Identifier: MIT
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rsource "kscan/Kconfig"
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rsource "sensor/Kconfig"
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rsource "sensor/Kconfig"
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rsource "display/Kconfig"
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 The ZMK Contributors
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# SPDX-License-Identifier: MIT
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zephyr_sources_ifdef(CONFIG_IL0323 il0323.c)
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@ -0,0 +1,4 @@
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# Copyright (c) 2021 The ZMK Contributors
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# SPDX-License-Identifier: MIT
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rsource "Kconfig.il0323"
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@ -0,0 +1,11 @@
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# Copyright (c) 2020 Phytec Messtechnik GmbH, Peter Johanson
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# SPDX-License-Identifier: Apache-2.0
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# IL0323 display controller configuration options
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config IL0323
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bool "IL0323 compatible display controller driver"
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depends on SPI
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depends on HEAP_MEM_POOL_SIZE != 0
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help
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Enable driver for IL0323 compatible controller.
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@ -0,0 +1,432 @@
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/*
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* Copyright (c) 2020 PHYTEC Messtechnik GmbHH, Peter Johanson
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT gooddisplay_il0323
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#include <string.h>
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#include <device.h>
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#include <init.h>
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#include <drivers/display.h>
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#include <drivers/gpio.h>
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#include <drivers/spi.h>
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#include <sys/byteorder.h>
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#include "il0323_regs.h"
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#include <logging/log.h>
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LOG_MODULE_REGISTER(il0323, CONFIG_DISPLAY_LOG_LEVEL);
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/**
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* IL0323 compatible EPD controller driver.
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*
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*/
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#define IL0323_SPI_FREQ DT_INST_PROP(0, spi_max_frequency)
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#define IL0323_BUS_NAME DT_INST_BUS_LABEL(0)
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#define IL0323_DC_PIN DT_INST_GPIO_PIN(0, dc_gpios)
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#define IL0323_DC_FLAGS DT_INST_GPIO_FLAGS(0, dc_gpios)
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#define IL0323_DC_CNTRL DT_INST_GPIO_LABEL(0, dc_gpios)
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#define IL0323_CS_PIN DT_INST_SPI_DEV_CS_GPIOS_PIN(0)
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#define IL0323_CS_FLAGS DT_INST_SPI_DEV_CS_GPIOS_FLAGS(0)
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#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
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#define IL0323_CS_CNTRL DT_INST_SPI_DEV_CS_GPIOS_LABEL(0)
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#endif
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#define IL0323_BUSY_PIN DT_INST_GPIO_PIN(0, busy_gpios)
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#define IL0323_BUSY_CNTRL DT_INST_GPIO_LABEL(0, busy_gpios)
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#define IL0323_BUSY_FLAGS DT_INST_GPIO_FLAGS(0, busy_gpios)
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#define IL0323_RESET_PIN DT_INST_GPIO_PIN(0, reset_gpios)
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#define IL0323_RESET_CNTRL DT_INST_GPIO_LABEL(0, reset_gpios)
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#define IL0323_RESET_FLAGS DT_INST_GPIO_FLAGS(0, reset_gpios)
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#define EPD_PANEL_WIDTH DT_INST_PROP(0, width)
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#define EPD_PANEL_HEIGHT DT_INST_PROP(0, height)
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#define IL0323_PIXELS_PER_BYTE 8U
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/* Horizontally aligned page! */
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#define IL0323_NUMOF_PAGES (EPD_PANEL_WIDTH / IL0323_PIXELS_PER_BYTE)
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#define IL0323_PANEL_FIRST_GATE 0U
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#define IL0323_PANEL_LAST_GATE (EPD_PANEL_HEIGHT - 1)
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#define IL0323_PANEL_FIRST_PAGE 0U
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#define IL0323_PANEL_LAST_PAGE (IL0323_NUMOF_PAGES - 1)
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#define IL0323_BUFFER_SIZE 1280
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struct il0323_data {
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const struct device *reset;
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const struct device *dc;
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const struct device *busy;
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const struct device *spi_dev;
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struct spi_config spi_config;
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#if defined(IL0323_CS_CNTRL)
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struct spi_cs_control cs_ctrl;
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#endif
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};
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static uint8_t il0323_pwr[] = DT_INST_PROP(0, pwr);
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static uint8_t last_buffer[IL0323_BUFFER_SIZE];
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static bool blanking_on = true;
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static inline int il0323_write_cmd(struct il0323_data *driver, uint8_t cmd, uint8_t *data,
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size_t len) {
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struct spi_buf buf = {.buf = &cmd, .len = sizeof(cmd)};
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struct spi_buf_set buf_set = {.buffers = &buf, .count = 1};
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gpio_pin_set(driver->dc, IL0323_DC_PIN, 1);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -EIO;
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}
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if (data != NULL) {
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buf.buf = data;
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buf.len = len;
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gpio_pin_set(driver->dc, IL0323_DC_PIN, 0);
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if (spi_write(driver->spi_dev, &driver->spi_config, &buf_set)) {
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return -EIO;
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}
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}
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return 0;
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}
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static inline void il0323_busy_wait(struct il0323_data *driver) {
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int pin = gpio_pin_get(driver->busy, IL0323_BUSY_PIN);
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while (pin > 0) {
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__ASSERT(pin >= 0, "Failed to get pin level");
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// LOG_DBG("wait %u", pin);
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k_msleep(IL0323_BUSY_DELAY);
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pin = gpio_pin_get(driver->busy, IL0323_BUSY_PIN);
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}
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}
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static int il0323_update_display(const struct device *dev) {
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struct il0323_data *driver = dev->data;
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LOG_DBG("Trigger update sequence");
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if (il0323_write_cmd(driver, IL0323_CMD_DRF, NULL, 0)) {
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return -EIO;
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}
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k_msleep(IL0323_BUSY_DELAY);
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return 0;
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}
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static int il0323_blanking_off(const struct device *dev) {
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struct il0323_data *driver = dev->data;
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if (blanking_on) {
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/* Update EPD pannel in normal mode */
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il0323_busy_wait(driver);
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if (il0323_update_display(dev)) {
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return -EIO;
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}
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}
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blanking_on = false;
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return 0;
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}
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static int il0323_blanking_on(const struct device *dev) {
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blanking_on = true;
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return 0;
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}
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static int il0323_write(const struct device *dev, const uint16_t x, const uint16_t y,
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const struct display_buffer_descriptor *desc, const void *buf) {
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struct il0323_data *driver = dev->data;
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uint16_t x_end_idx = x + desc->width - 1;
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uint16_t y_end_idx = y + desc->height - 1;
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uint8_t ptl[IL0323_PTL_REG_LENGTH] = {0};
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size_t buf_len;
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LOG_DBG("x %u, y %u, height %u, width %u, pitch %u", x, y, desc->height, desc->width,
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desc->pitch);
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buf_len = MIN(desc->buf_size, desc->height * desc->width / IL0323_PIXELS_PER_BYTE);
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__ASSERT(desc->width <= desc->pitch, "Pitch is smaller then width");
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__ASSERT(buf != NULL, "Buffer is not available");
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__ASSERT(buf_len != 0U, "Buffer of length zero");
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__ASSERT(!(desc->width % IL0323_PIXELS_PER_BYTE), "Buffer width not multiple of %d",
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IL0323_PIXELS_PER_BYTE);
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LOG_DBG("buf_len %d", buf_len);
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if ((y_end_idx > (EPD_PANEL_HEIGHT - 1)) || (x_end_idx > (EPD_PANEL_WIDTH - 1))) {
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LOG_ERR("Position out of bounds");
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return -EINVAL;
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}
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/* Setup Partial Window and enable Partial Mode */
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ptl[IL0323_PTL_HRST_IDX] = x;
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ptl[IL0323_PTL_HRED_IDX] = x_end_idx;
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ptl[IL0323_PTL_VRST_IDX] = y;
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ptl[IL0323_PTL_VRED_IDX] = y_end_idx;
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ptl[sizeof(ptl) - 1] = IL0323_PTL_PT_SCAN;
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LOG_HEXDUMP_DBG(ptl, sizeof(ptl), "ptl");
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il0323_busy_wait(driver);
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if (il0323_write_cmd(driver, IL0323_CMD_PIN, NULL, 0)) {
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return -EIO;
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}
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if (il0323_write_cmd(driver, IL0323_CMD_PTL, ptl, sizeof(ptl))) {
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return -EIO;
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}
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if (il0323_write_cmd(driver, IL0323_CMD_DTM1, last_buffer, IL0323_BUFFER_SIZE)) {
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return -EIO;
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}
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if (il0323_write_cmd(driver, IL0323_CMD_DTM2, (uint8_t *)buf, buf_len)) {
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return -EIO;
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}
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memcpy(last_buffer, (uint8_t *)buf, IL0323_BUFFER_SIZE);
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/* Update partial window and disable Partial Mode */
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if (blanking_on == false) {
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if (il0323_update_display(dev)) {
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return -EIO;
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}
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}
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if (il0323_write_cmd(driver, IL0323_CMD_POUT, NULL, 0)) {
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return -EIO;
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}
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return 0;
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}
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static int il0323_read(const struct device *dev, const uint16_t x, const uint16_t y,
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const struct display_buffer_descriptor *desc, void *buf) {
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LOG_ERR("not supported");
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return -ENOTSUP;
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}
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static void *il0323_get_framebuffer(const struct device *dev) {
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LOG_ERR("not supported");
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return NULL;
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}
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static int il0323_set_brightness(const struct device *dev, const uint8_t brightness) {
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LOG_WRN("not supported");
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return -ENOTSUP;
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}
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static int il0323_set_contrast(const struct device *dev, uint8_t contrast) {
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LOG_WRN("not supported");
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return -ENOTSUP;
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}
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static void il0323_get_capabilities(const struct device *dev, struct display_capabilities *caps) {
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memset(caps, 0, sizeof(struct display_capabilities));
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caps->x_resolution = EPD_PANEL_WIDTH;
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caps->y_resolution = EPD_PANEL_HEIGHT;
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caps->supported_pixel_formats = PIXEL_FORMAT_MONO10;
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caps->current_pixel_format = PIXEL_FORMAT_MONO10;
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caps->screen_info = SCREEN_INFO_MONO_MSB_FIRST | SCREEN_INFO_EPD;
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}
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static int il0323_set_orientation(const struct device *dev,
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const enum display_orientation orientation) {
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LOG_ERR("Unsupported");
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return -ENOTSUP;
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}
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static int il0323_set_pixel_format(const struct device *dev, const enum display_pixel_format pf) {
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if (pf == PIXEL_FORMAT_MONO10) {
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return 0;
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}
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LOG_ERR("not supported");
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return -ENOTSUP;
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}
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static int il0323_clear_and_write_buffer(const struct device *dev, uint8_t pattern, bool update) {
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struct display_buffer_descriptor desc = {
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.buf_size = IL0323_NUMOF_PAGES,
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.width = EPD_PANEL_WIDTH,
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.height = 1,
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.pitch = EPD_PANEL_WIDTH,
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};
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uint8_t *line;
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line = k_malloc(IL0323_NUMOF_PAGES);
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if (line == NULL) {
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return -ENOMEM;
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}
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memset(line, pattern, IL0323_NUMOF_PAGES);
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for (int i = 0; i < EPD_PANEL_HEIGHT; i++) {
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il0323_write(dev, 0, i, &desc, line);
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}
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k_free(line);
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if (update == true) {
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if (il0323_update_display(dev)) {
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return -EIO;
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}
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}
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return 0;
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}
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static int il0323_controller_init(const struct device *dev) {
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struct il0323_data *driver = dev->data;
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uint8_t tmp[IL0323_TRES_REG_LENGTH];
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LOG_DBG("");
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gpio_pin_set(driver->reset, IL0323_RESET_PIN, 1);
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k_msleep(IL0323_RESET_DELAY);
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gpio_pin_set(driver->reset, IL0323_RESET_PIN, 0);
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k_msleep(IL0323_RESET_DELAY);
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il0323_busy_wait(driver);
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LOG_DBG("Initialize IL0323 controller");
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if (il0323_write_cmd(driver, IL0323_CMD_PWR, il0323_pwr, sizeof(il0323_pwr))) {
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return -EIO;
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}
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/* Turn on: booster, controller, regulators, and sensor. */
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if (il0323_write_cmd(driver, IL0323_CMD_PON, NULL, 0)) {
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return -EIO;
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}
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k_msleep(IL0323_PON_DELAY);
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il0323_busy_wait(driver);
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/* Pannel settings, KW mode */
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tmp[0] = IL0323_PSR_UD | IL0323_PSR_SHL | IL0323_PSR_SHD | IL0323_PSR_RST;
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#if EPD_PANEL_WIDTH == 80
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#if EPD_PANEL_HEIGHT == 128
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tmp[0] |= IL0323_PSR_RES_HEIGHT;
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#endif /* panel height */
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#else
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tmp[0] |= IL0323_PSR_RES_WIDTH;
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#if EPD_PANEL_HEIGHT == 96
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tmp[0] |= IL0323_PSR_RES_HEIGHT;
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#else
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#endif /* panel height */
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#endif /* panel width */
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LOG_HEXDUMP_DBG(tmp, 1, "PSR");
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if (il0323_write_cmd(driver, IL0323_CMD_PSR, tmp, 1)) {
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return -EIO;
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}
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/* Set panel resolution */
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tmp[IL0323_TRES_HRES_IDX] = EPD_PANEL_WIDTH;
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tmp[IL0323_TRES_VRES_IDX] = EPD_PANEL_HEIGHT;
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LOG_HEXDUMP_DBG(tmp, IL0323_TRES_REG_LENGTH, "TRES");
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if (il0323_write_cmd(driver, IL0323_CMD_TRES, tmp, IL0323_TRES_REG_LENGTH)) {
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return -EIO;
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}
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tmp[IL0323_CDI_CDI_IDX] = DT_INST_PROP(0, cdi);
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LOG_HEXDUMP_DBG(tmp, IL0323_CDI_REG_LENGTH, "CDI");
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if (il0323_write_cmd(driver, IL0323_CMD_CDI, tmp, IL0323_CDI_REG_LENGTH)) {
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return -EIO;
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}
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tmp[0] = DT_INST_PROP(0, tcon);
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if (il0323_write_cmd(driver, IL0323_CMD_TCON, tmp, 1)) {
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return -EIO;
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}
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/* Enable Auto Sequence */
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tmp[0] = IL0323_AUTO_PON_DRF_POF;
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if (il0323_write_cmd(driver, IL0323_CMD_AUTO, tmp, 1)) {
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return -EIO;
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}
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if (il0323_clear_and_write_buffer(dev, 0xff, false)) {
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return -1;
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}
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return 0;
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}
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static int il0323_init(const struct device *dev) {
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struct il0323_data *driver = dev->data;
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LOG_DBG("");
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driver->spi_dev = device_get_binding(IL0323_BUS_NAME);
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if (driver->spi_dev == NULL) {
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LOG_ERR("Could not get SPI device for IL0323");
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return -EIO;
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}
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driver->spi_config.frequency = IL0323_SPI_FREQ;
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driver->spi_config.operation = SPI_OP_MODE_MASTER | SPI_WORD_SET(8);
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driver->spi_config.slave = DT_INST_REG_ADDR(0);
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driver->spi_config.cs = NULL;
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driver->reset = device_get_binding(IL0323_RESET_CNTRL);
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if (driver->reset == NULL) {
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LOG_ERR("Could not get GPIO port for IL0323 reset");
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return -EIO;
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}
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gpio_pin_configure(driver->reset, IL0323_RESET_PIN, GPIO_OUTPUT_INACTIVE | IL0323_RESET_FLAGS);
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driver->dc = device_get_binding(IL0323_DC_CNTRL);
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if (driver->dc == NULL) {
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LOG_ERR("Could not get GPIO port for IL0323 DC signal");
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return -EIO;
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}
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gpio_pin_configure(driver->dc, IL0323_DC_PIN, GPIO_OUTPUT_INACTIVE | IL0323_DC_FLAGS);
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driver->busy = device_get_binding(IL0323_BUSY_CNTRL);
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if (driver->busy == NULL) {
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LOG_ERR("Could not get GPIO port for IL0323 busy signal");
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return -EIO;
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}
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gpio_pin_configure(driver->busy, IL0323_BUSY_PIN, GPIO_INPUT | IL0323_BUSY_FLAGS);
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#if defined(IL0323_CS_CNTRL)
|
||||
driver->cs_ctrl.gpio_dev = device_get_binding(IL0323_CS_CNTRL);
|
||||
if (!driver->cs_ctrl.gpio_dev) {
|
||||
LOG_ERR("Unable to get SPI GPIO CS device");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
driver->cs_ctrl.gpio_pin = IL0323_CS_PIN;
|
||||
driver->cs_ctrl.gpio_dt_flags = IL0323_CS_FLAGS;
|
||||
driver->cs_ctrl.delay = 0U;
|
||||
driver->spi_config.cs = &driver->cs_ctrl;
|
||||
#endif
|
||||
|
||||
return il0323_controller_init(dev);
|
||||
}
|
||||
|
||||
static struct il0323_data il0323_driver;
|
||||
|
||||
static struct display_driver_api il0323_driver_api = {
|
||||
.blanking_on = il0323_blanking_on,
|
||||
.blanking_off = il0323_blanking_off,
|
||||
.write = il0323_write,
|
||||
.read = il0323_read,
|
||||
.get_framebuffer = il0323_get_framebuffer,
|
||||
.set_brightness = il0323_set_brightness,
|
||||
.set_contrast = il0323_set_contrast,
|
||||
.get_capabilities = il0323_get_capabilities,
|
||||
.set_pixel_format = il0323_set_pixel_format,
|
||||
.set_orientation = il0323_set_orientation,
|
||||
};
|
||||
|
||||
DEVICE_DT_INST_DEFINE(0, il0323_init, device_pm_control_nop, &il0323_driver, NULL, POST_KERNEL,
|
||||
CONFIG_APPLICATION_INIT_PRIORITY, &il0323_driver_api);
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
* Copyright (c) 2020 PHYTEC Messtechnik GmbH, Peter Johanson
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef ZEPHYR_DRIVERS_DISPLAY_IL0323_REGS_H_
|
||||
#define ZEPHYR_DRIVERS_DISPLAY_IL0323_REGS_H_
|
||||
|
||||
#define IL0323_CMD_PSR 0x00
|
||||
#define IL0323_CMD_PWR 0x01
|
||||
#define IL0323_CMD_POF 0x02
|
||||
#define IL0323_CMD_PFS 0x03
|
||||
#define IL0323_CMD_PON 0x04
|
||||
#define IL0323_CMD_PMES 0x05
|
||||
#define IL0323_CMD_CPSET 0x06
|
||||
#define IL0323_CMD_DSLP 0x07
|
||||
#define IL0323_CMD_DTM1 0x10
|
||||
#define IL0323_CMD_DSP 0x11
|
||||
#define IL0323_CMD_DRF 0x12
|
||||
#define IL0323_CMD_DTM2 0x13
|
||||
#define IL0323_CMD_AUTO 0x17
|
||||
#define IL0323_CMD_LUTOPT 0x2A
|
||||
#define IL0323_CMD_PLL 0x30
|
||||
#define IL0323_CMD_TSC 0x40
|
||||
#define IL0323_CMD_TSE 0x41
|
||||
#define IL0323_CMD_PBC 0x44
|
||||
#define IL0323_CMD_CDI 0x50
|
||||
#define IL0323_CMD_LPD 0x51
|
||||
#define IL0323_CMD_TCON 0x60
|
||||
#define IL0323_CMD_TRES 0x61
|
||||
#define IL0323_CMD_GSST 0x65
|
||||
#define IL0323_CMD_REV 0x70
|
||||
#define IL0323_CMD_FLG 0x71
|
||||
#define IL0323_CMD_CRC 0x72
|
||||
#define IL0323_CMD_AMV 0x80
|
||||
#define IL0323_CMD_VV 0x81
|
||||
#define IL0323_CMD_VDCS 0x82
|
||||
#define IL0323_CMD_PTL 0x90
|
||||
#define IL0323_CMD_PIN 0x91
|
||||
#define IL0323_CMD_POUT 0x92
|
||||
#define IL0323_CMD_PGM 0xA0
|
||||
#define IL0323_CMD_APG 0xA1
|
||||
#define IL0323_CMD_ROTP 0xA2
|
||||
#define IL0323_CMD_CCSET 0xE0
|
||||
#define IL0323_CMD_PWS 0xE3
|
||||
#define IL0323_CMD_LVSEL 0xE4
|
||||
#define IL0323_CMD_TSSET 0xE5
|
||||
|
||||
#define IL0323_PSR_RES_WIDTH BIT(7)
|
||||
#define IL0323_PSR_RES_HEIGHT BIT(6)
|
||||
#define IL0323_PSR_LUT_REG BIT(5)
|
||||
#define IL0323_PSR_LUT_OTP BIT(4)
|
||||
#define IL0323_PSR_UD BIT(3)
|
||||
#define IL0323_PSR_SHL BIT(2)
|
||||
#define IL0323_PSR_SHD BIT(1)
|
||||
#define IL0323_PSR_RST BIT(0)
|
||||
|
||||
#define IL0323_AUTO_PON_DRF_POF 0xA5
|
||||
#define IL0323_AUTO_PON_DRF_POF_DSLP 0xA7
|
||||
|
||||
#define IL0323_CDI_REG_LENGTH 1U
|
||||
#define IL0323_CDI_CDI_IDX 0
|
||||
|
||||
#define IL0323_TRES_REG_LENGTH 2U
|
||||
#define IL0323_TRES_HRES_IDX 0
|
||||
#define IL0323_TRES_VRES_IDX 1
|
||||
|
||||
#define IL0323_PTL_REG_LENGTH 5U
|
||||
#define IL0323_PTL_HRST_IDX 0
|
||||
#define IL0323_PTL_HRED_IDX 1
|
||||
#define IL0323_PTL_VRST_IDX 2
|
||||
#define IL0323_PTL_VRED_IDX 3
|
||||
#define IL0323_PTL_PT_SCAN BIT(0)
|
||||
|
||||
/* Time constants in ms */
|
||||
#define IL0323_RESET_DELAY 10U
|
||||
#define IL0323_PON_DELAY 100U
|
||||
#define IL0323_BUSY_DELAY 1U
|
||||
|
||||
#endif /* ZEPHYR_DRIVERS_DISPLAY_IL0323_REGS_H_ */
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
# Copyright (c) 2020, Phytec Messtechnik GmbH, Peter Johanson
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
description: IL0323 EPD display controller
|
||||
|
||||
compatible: "gooddisplay,il0323"
|
||||
|
||||
include: spi-device.yaml
|
||||
|
||||
properties:
|
||||
height:
|
||||
type: int
|
||||
required: true
|
||||
description: Height in pixel of the panel driven by the controller
|
||||
|
||||
width:
|
||||
type: int
|
||||
required: true
|
||||
description: Width in pixel of the panel driven by the controller
|
||||
|
||||
reset-gpios:
|
||||
type: phandle-array
|
||||
required: true
|
||||
description: RESET pin.
|
||||
|
||||
The RESET pin of GD7965 is active low.
|
||||
If connected directly the MCU pin should be configured
|
||||
as active low.
|
||||
|
||||
dc-gpios:
|
||||
type: phandle-array
|
||||
required: true
|
||||
description: DC pin.
|
||||
|
||||
The DC pin of GD7965 is active low (transmission command byte).
|
||||
If connected directly the MCU pin should be configured
|
||||
as active low.
|
||||
|
||||
busy-gpios:
|
||||
type: phandle-array
|
||||
required: true
|
||||
description: BUSY pin.
|
||||
|
||||
The BUSY pin of GD7965 is active low.
|
||||
If connected directly the MCU pin should be configured
|
||||
as active low.
|
||||
|
||||
pwr:
|
||||
type: uint8-array
|
||||
required: true
|
||||
description: Power Setting (PWR) values
|
||||
|
||||
cdi:
|
||||
type: int
|
||||
required: true
|
||||
description: VCOM and data interval value
|
||||
|
||||
tcon:
|
||||
type: int
|
||||
required: true
|
||||
description: TCON setting value
|
||||
Loading…
Reference in New Issue