ffcb904b66
Includes the Source (as an Eclipse project) and the Hardware files (including schematic, layout, gerbers, and bill of materials.) The firmware is extremely incomplete. At this point the DDS chips work (with controlled phase relationship), the LCD (with fast-ish SPI, scrolling, and GFX, modified from Adafruit's library), the encoder knob, and LED work. The ADC is capturing, but not in a usable way, but it's enough to feed the DSP code and see a nice pretty waterfall. Timers, interrupts, and DACs are not working yet.
249 lines
8.7 KiB
C
249 lines
8.7 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_iwdg.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 18-February-2014
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* @brief Header file of IWDG HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_IWDG_H
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#define __STM32F4xx_HAL_IWDG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup IWDG
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief IWDG HAL State Structure definition
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*/
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typedef enum
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{
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HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
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HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
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HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
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HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
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HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
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}HAL_IWDG_StateTypeDef;
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/**
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* @brief IWDG Init structure definition
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*/
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typedef struct
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{
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uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
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This parameter can be a value of @ref IWDG_Prescaler */
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uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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}IWDG_InitTypeDef;
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/**
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* @brief IWDG handle Structure definition
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*/
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typedef struct
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{
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IWDG_TypeDef *Instance; /*!< Register base address */
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IWDG_InitTypeDef Init; /*!< IWDG required parameters */
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HAL_LockTypeDef Lock; /*!< IWDG locking object */
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__IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
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}IWDG_HandleTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Constants
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* @{
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*/
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/** @defgroup IWDG_Registers_BitMask
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* @{
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*/
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/* --- KR Register ---*/
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/* KR register bit mask */
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#define KR_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG reload counter enable */
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#define KR_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG peripheral enable */
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#define KR_KEY_EWA ((uint32_t)0x5555) /*!< IWDG KR write Access enable */
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#define KR_KEY_DWA ((uint32_t)0x0000) /*!< IWDG KR write Access disable */
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/**
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* @}
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*/
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/** @defgroup IWDG_Flag_definition
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* @{
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*/
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#define IWDG_FLAG_PVU ((uint32_t)0x0001) /*!< Watchdog counter prescaler value update flag */
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#define IWDG_FLAG_RVU ((uint32_t)0x0002) /*!< Watchdog counter reload value update flag */
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#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || \
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((FLAG) == IWDG_FLAG_RVU))
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/**
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* @}
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*/
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/** @defgroup IWDG_Prescaler
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* @{
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*/
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#define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
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#define IWDG_PRESCALER_8 ((uint8_t)0x01) /*!< IWDG prescaler set to 8 */
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#define IWDG_PRESCALER_16 ((uint8_t)0x02) /*!< IWDG prescaler set to 16 */
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#define IWDG_PRESCALER_32 ((uint8_t)0x03) /*!< IWDG prescaler set to 32 */
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#define IWDG_PRESCALER_64 ((uint8_t)0x04) /*!< IWDG prescaler set to 64 */
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#define IWDG_PRESCALER_128 ((uint8_t)0x05) /*!< IWDG prescaler set to 128 */
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#define IWDG_PRESCALER_256 ((uint8_t)0x06) /*!< IWDG prescaler set to 256 */
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#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_PRESCALER_4) || \
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((PRESCALER) == IWDG_PRESCALER_8) || \
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((PRESCALER) == IWDG_PRESCALER_16) || \
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((PRESCALER) == IWDG_PRESCALER_32) || \
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((PRESCALER) == IWDG_PRESCALER_64) || \
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((PRESCALER) == IWDG_PRESCALER_128)|| \
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((PRESCALER) == IWDG_PRESCALER_256))
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/**
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* @}
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*/
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/** @defgroup IWDG_Reload_Value
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* @{
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*/
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#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/**
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* @brief Enables the IWDG peripheral.
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* @param __HANDLE__: IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_START(__HANDLE__) ((__HANDLE__)->Instance->KR |= KR_KEY_ENABLE)
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/**
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* @brief Reloads IWDG counter with value defined in the reload register
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* (write access to IWDG_PR and IWDG_RLR registers disabled).
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* @param __HANDLE__: IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_RELOAD)
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/**
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* @brief Enables write access to IWDG_PR and IWDG_RLR registers.
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* @param __HANDLE__: IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_EWA)
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/**
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* @brief Disables write access to IWDG_PR and IWDG_RLR registers.
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* @param __HANDLE__: IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_DWA)
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/**
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* @brief Gets the selected IWDG's flag status.
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* @param __HANDLE__: IWDG handle
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
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* @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
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/**
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* @brief Clears the IWDG's pending flags.
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* @param __HANDLE__: IWDG handle
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* @param __FLAG__: specifies the flag to clear.
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* This parameter can be one of the following values:
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* @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
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* @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
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* @retval None
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*/
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#define __HAL_IWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__))
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/* Exported functions --------------------------------------------------------*/
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/* Initialization/de-initialization functions ********************************/
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HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
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void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
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/* I/O operation functions ****************************************************/
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HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
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HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
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/* Peripheral State functions ************************************************/
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HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F4xx_HAL_IWDG_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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