diff --git a/Hardware/PSDR.sch b/Hardware/PSDR.sch
index 7fb5bf8..8bdb7e1 100644
Binary files a/Hardware/PSDR.sch and b/Hardware/PSDR.sch differ
diff --git a/Source/include/main.h b/Source/include/main.h
index dc397f8..74b222a 100644
--- a/Source/include/main.h
+++ b/Source/include/main.h
@@ -36,8 +36,10 @@
 
 #ifdef PSDR257
 //#define HSE_VALUE 26000000
-#define ARM_MATH_CM7
+//#define ARM_MATH_CM7
 //#include "stm32f756xx.h"
+#define  ART_ACCLERATOR_ENABLE 1
+
 #include "stm32f7xx.h"
 #include "stm32f7xx_hal_conf.h"
 #include "stm32f7xx_hal.h"
diff --git a/Source/src/_initialize_hardware.c b/Source/src/_initialize_hardware.c
index 6b58998..1170c94 100644
--- a/Source/src/_initialize_hardware.c
+++ b/Source/src/_initialize_hardware.c
@@ -152,7 +152,7 @@ SystemClock_Config (void)
   RCC_OscInitStruct.PLL.PLLM = (HSI_VALUE / 1000000u);
 #endif
 
-  RCC_OscInitStruct.PLL.PLLN = 216; /* 192 MHz */
+  RCC_OscInitStruct.PLL.PLLN = 432; /* 192 MHz */
   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
   RCC_OscInitStruct.PLL.PLLQ = 8; /* To make USB work. */
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
diff --git a/Source/src/adc.c b/Source/src/adc.c
index d0f96c8..35a7aad 100644
--- a/Source/src/adc.c
+++ b/Source/src/adc.c
@@ -18,8 +18,10 @@ void initAdc()
 		__GPIOB_CLK_ENABLE();
 		__GPIOC_CLK_ENABLE();
 
-		__ADC_FORCE_RESET();
-		__ADC_RELEASE_RESET();
+		//__ADC_FORCE_RESET();
+		//__ADC_RELEASE_RESET();
+		__HAL_RCC_ADC_FORCE_RESET();
+		__HAL_RCC_ADC_RELEASE_RESET();
 
 		  AdcHandle1.Instance          = ADC1;
 
@@ -87,17 +89,17 @@ void initAdc()
 
 		  sConfig1.Channel = ADC_MIC_CHANNEL;
 		  sConfig1.Rank = 1;
-		  sConfig1.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+		  sConfig1.SamplingTime = ADC_SAMPLETIME_15CYCLES;
 		  sConfig1.Offset = 0;
 
 		  sConfig2.Channel = ADC_RX_I_CHANNEL;
 		  sConfig2.Rank = 1;
-		  sConfig2.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+		  sConfig2.SamplingTime = ADC_SAMPLETIME_15CYCLES;
 		  sConfig2.Offset = 0;
 
 		  sConfig3.Channel = ADC_RX_Q_CHANNEL;
 		  sConfig3.Rank = 1;
-		  sConfig3.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+		  sConfig3.SamplingTime = ADC_SAMPLETIME_15CYCLES;
 		  sConfig3.Offset = 0;
 
 		  if(HAL_ADC_ConfigChannel(&AdcHandle1, &sConfig1) != HAL_OK)
@@ -133,9 +135,15 @@ void initAdc()
 		      //while(HAL_ADC_GetState(&AdcHandle1) != HAL_ADC_STATE_REG_EOC);
 
 		     		    /* Check if the continous conversion of regular channel is finished */
-		    if(HAL_ADC_GetState(&AdcHandle1) == 0x300 /*HAL_ADC_STATE_REG_EOC*/
-		    		&& HAL_ADC_GetState(&AdcHandle2) == 0x300 /*HAL_ADC_STATE_REG_EOC*/
-		    		&& HAL_ADC_GetState(&AdcHandle3) == 0x300 /*HAL_ADC_STATE_REG_EOC*/)
+//		    if(HAL_ADC_GetState(&AdcHandle1) == 0x300 /*HAL_ADC_STATE_REG_EOC*/
+//		    		&& HAL_ADC_GetState(&AdcHandle2) == 0x300 /*HAL_ADC_STATE_REG_EOC*/
+//		    		&& HAL_ADC_GetState(&AdcHandle3) == 0x300 /*HAL_ADC_STATE_REG_EOC*/)
+
+		      if(HAL_IS_BIT_SET(HAL_ADC_GetState(&AdcHandle1), HAL_ADC_STATE_REG_EOC) &&
+		          HAL_IS_BIT_SET(HAL_ADC_GetState(&AdcHandle2), HAL_ADC_STATE_REG_EOC) &&
+		          HAL_IS_BIT_SET(HAL_ADC_GetState(&AdcHandle3), HAL_ADC_STATE_REG_EOC))
+
+
 		    {
 		      /*##-5- Get the converted value of regular channel  ########################*/
 		      uhADCxConvertedValue1 = HAL_ADC_GetValue(&AdcHandle1);
diff --git a/Source/src/main.c b/Source/src/main.c
index cc05e31..6da0dd3 100644
--- a/Source/src/main.c
+++ b/Source/src/main.c
@@ -44,6 +44,7 @@
 //#pragma GCC diagnostic ignored "-Wreturn-type"
 #pragma GCC diagnostic ignored "-Wfloat-conversion"
 
+static void CPU_CACHE_Enable(void);
 void dac1SetValue(uint16_t value);
 void dac2SetValue(uint16_t value);
 //void ddsPrefix(void);
@@ -96,37 +97,55 @@ unsigned int tone = 0;
 
 uint8_t displayUpdating = 0;
 
-/** System Clock Configuration
-*/
-void SystemClock_Config(void)
-{
-
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-
-  __PWR_CLK_ENABLE();
-
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 13;
-  RCC_OscInitStruct.PLL.PLLN = 216;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = 9;
-  HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1
-                              |RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
-
-}
+///** System Clock Configuration
+//*/
+//void SystemClock_Config(void)
+//{
+//
+//  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+//  RCC_OscInitTypeDef RCC_OscInitStruct;
+//
+//  __PWR_CLK_ENABLE();
+//
+//  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); //needed?
+//
+//  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+//  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+//  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+//  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+//  RCC_OscInitStruct.PLL.PLLM = 26;
+//  RCC_OscInitStruct.PLL.PLLN = 432;
+//  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+//  RCC_OscInitStruct.PLL.PLLQ = 9;
+//  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+//
+//  HAL_StatusTypeDef ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
+//  if(ret != HAL_OK)
+//    {
+//      while(1) { ; }
+//    }
+//
+//  /* Activate the OverDrive to reach the 216 MHz Frequency */
+//    ret = HAL_PWREx_EnableOverDrive();
+//    if(ret != HAL_OK)
+//    {
+//      while(1) { ; }
+//    }
+//
+//  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_HCLK |RCC_CLOCKTYPE_PCLK1
+//                              |RCC_CLOCKTYPE_PCLK2;
+//  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+//  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+//  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+//  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+//
+//  ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
+//  if(ret != HAL_OK)
+//    {
+//      while(1) { ; }
+//    }
+//
+//}
 
 void polarToRect(float m, float a, float32_t* x, float32_t* y)
 {
@@ -777,9 +796,14 @@ int
 main(int argc, char* argv[])
 {
 
+  /* Enable the CPU Cache */
+  CPU_CACHE_Enable();
+
+
+
 	HAL_Init();
 
-	SystemClock_Config();
+	//SystemClock_Config();
 
 	//HAL_RCC_OscConfig()
 	//	RCC_ClkInitStruct clockInitStructure;
@@ -1974,6 +1998,20 @@ void dac2SetValue(uint16_t value)
 	HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_2, DAC_ALIGN_12B_R, value);
 }
 
+/**
+  * @brief  CPU L1-Cache enable.
+  * @param  None
+  * @retval None
+  */
+static void CPU_CACHE_Enable(void)
+{
+  /* Enable I-Cache */
+  SCB_EnableICache();
+
+  /* Enable D-Cache */
+  SCB_EnableDCache();
+}
+
 #pragma GCC diagnostic pop
 
 // ----------------------------------------------------------------------------